 | CPU - Central Processing Unit
 | Control Unit |
 | ALU |
 | Registers
 | PC |
 | IR |
|
|
 | Memory |
 | Bus |
 | Instructions
 | Register - memory |
 | Register - register |
|
 | Data Path
 | Registers |
 | ALU |
 | buses |
 | Data path cycle |
|
 | Instruction Execution - Fetch-Decode-Execute
 | Fetch from memory into IR |
 | Change PC |
 | Instruction type? |
 | Memory required? |
 | Fetch data if needed |
 | Execute |
 | Repeat |
|
 | Interpreted instruction sets...
 | Fix incorrectly implemented instructions in the field or make up for
design deficiencies |
 | Add new instructions a minimal cost |
 | Structured design: efficient development, testing and documenting |
|
 | RISC vs. CICS
 | Smaller instruction set initially (R) |
 | Simple instructions that can execute in one cycle of the data path (R) |
 | Backward compatible (C) |
 | Combine RISC for common instructions, complex instructions less common
(C) |
|
 | Design Principles
 | Common instructions executed by hardware |
 | Maximize the rate at which instructions are issued |
 | Instructions should be easy to decode
 | regular |
 | fixed length |
 | small number of fields |
 | fewer instruction formats |
|
 | Only loads and stores should reference memory |
 | Provide lots of registers |
|
 | Pipelining, dividing instruction execution into stages
 | Fetch |
 | Decode |
 | Operand Fetch |
 | Execution |
 | Write back |
|
 | Multiple pipelines |
 | Superscalar Architecture - multiple functional units |
 | Array Processors |
 | Vector Processors |
 | Multiprocessors |
 | Multicomputers |
 | Main memory
 | Bits |
 | BCD |
 | Memory addresses |
 | Byte order
 | Big endian (byte numbers left-to-right) |
 | Little endian (right-to-left) |
|
 | Error correcting codes |
 | Cache Memory
 | Economics - fast memory expensive |
 | Most heavily used memory words kept in fast memory |
 | Locality principle |
 | Mean access time = c + (1-h)m {c-cache access time, m-memory access
time,
h-hit ration (fraction of references found in cache)} |
 | Split cache vs. unified cache - split has instruction cache and data
cache |
|
 | Memory Packages |
|
 | Secondary Memory
 | Memory hierarchy |
 | Magnetic Disks
 | Track, sector, preamble, error correcting codes, intersector gap |
 | Winchester disks, cylinder, seek, rotational latency |
 | Audio-visual drives don't do thermal recalibrations |
 | Disk controller |
 | Floppy Disks |
 |
IDE - integrated drive electronics and Extended IDE (EIDE) |
 | SCSI - small computer system interface, high speed bus |
 | RAID -
redundant array of inexpensive disks
 | Striping, mirroring, parity drives, |
|
 | SLED - single large expensive disk |
|
 | Optical media
 | CD-ROM |
 | Red book |
 | Yellow book |
 | Green book |
 | High Sierra (IS 9660) |
 | CD-R (Orange Book) |
 | DVD (smaller pits, tighter spiral, red laser) |
|
|
 | Input/Output
 | Motherboard |
 | Controllers |
 | DMA |
 | Interrupt |
 | Bus arbiter |
 | Cycle stealing |
 | ISA bus |
 | EISA bus |
 | PCI bus |
 | Terminals |
 | Keyboards |
 | CRT Monitors |
 | LCD (passive matrix and active matrix) |
 | Character mapping vs. bit mapping |
 | 1024 x 768 x 24 bit color = 2.3 MB of video RAM |
 | RS232C Terminals |
 | Mice |
 | Printers - dot matrix, ink jet, laser |
 | Halftoning |
 | Color printers |
 | Modems ... |
 | ISDN |
|
 | Character codes
 | ASCII |
 | Unicode |
|